Different computing services have different requirements in terms of bandwidth, latency, data rates, etc. For example, 3G/4G cellular services have different requirements with respect to 5G cellular services, which has diverse use cases. To satisfy such different requirements, system designers often rely on multiple-core digital signal processing (DSP) systems [e.g. system-on-a-chip (SoC), etc.], where each DSP core has multiple threads. Conventional multiple thread DSP cores are typically fixed in the sense that the capabilities of each thread is equal and fixed.
Unfortunately, the fixed nature of such threads limits the system designers' ability to accommodate the different requirements for different services. Just by way of example, if a DSP core is designed to support a high data rate use case, such DSP core would exhibit very low power efficiency when supporting a regular date rate use case.
There is thus a need for addressing these and/or other issues associated with the prior art.